AMINAH chip



This section describes the architecture of AMINAH, the neuro-fuzzy processor used in DANIELA prototype board. AMINAH can operate with three different types of the WRBF algorithm; also it has an unlimited weight retention time (due to internal-refresh), a lower power consumption, and a high clock frequency.



Microphotograph of the AMINAH chip


AMINAH chip has two cascaded layers called hidden and output layer respectively. The architecture of one layer of AMINAH, is based on an NxM synaptic array and a vector of M neurons. Each neuron j is connected to a row of N synapses plus a threshold, while each column is connected to the same input Xi. The hidden layer has N=7 and M=16 while the output layer has N=15 and M=8.
Output signals are coded using Coherent Pulse Widht Modulation (CPWM), a particular Pulse Stream technique. Inputs signal Xi can either be analog or CPWM; in the former case, they are converted using internal Analog to CPWM converters.
The most important characteristics of AMINAH are:

For more information look at the article presented at AT '96 - 1st International Symposium Workshop on Neuro-Fuzzy Systems, held in Lausanne (Switzerland) at the end of August 1996.

Take also a look to the data-sheet.

If you need a program able to handle GZIP files under Windows 95, download WINPACK32.

Marcello Chiaberge
<marcello@polimage.polito.it>
Last Updated:
10/03/1997

Marcello Home Page