THE CHIP
This section describes a neural chip set based on CPWM techniques which
has been designed, manufactured using ES2's 1.5 micron CMOS
double-metal, single-poly technology, and it has been successfully
tested.
The CPWM neural chip set has been used in
CINTIA
as the analog computing kernel for
Neuro-Fuzzy control. It is worth noting that, as mentioned before,
such a system can also implement Fuzzy rules, as these can be automatically
converted to neural weight matrices (transparently from the user).
The neural chips are then tightly interfaced to the microcontroller via
an external digital weight memory. Several independent weight matrices
can be stored and selected at run time according to the state of
the FSA.
In the future, all the components of
CINTIA
will be included in a single chip
(currently under design), which will exploit all the advantages of the proposed
methods, together with an increased reliability and a much lower power
dissipation.
The actual version of the NN chip.
So far the chip set is composed of the following components:
- a reconfigurable synaptic array chip,
with 33x32 synapses and 32 neurons. Size is
7.200 square microns per synapse, plus 20.000 square microns per neuron.
The chip has a response time of 7.2 microseconds, equivalent to
a computing power of about 140 MCPS.
In practice,
that chip could run up to fo = 2 MHz, providing about ten folds
increase in total computing power.
- several I/O pads with different Analog to/from PS conversion capabilities.
Sizes are about 200x400 microns, with power dissipations
in the range 20 to 100 microwatts, with a sampling rate of
140 kHz.
- a pair of digital to/from PS converters.
- an array of 32 low-power, 8-bit, 100 ns, D/A converters
with internal memory for weight refresh.
- a 32x32 pixels CPWM imaging sensor (currently under analysis).
- other mathematical functions such as: Manhattan distance,
winner-take-all, etc.
The CPWM neural chip can easily implement large populations
of networks, as required by genetic algorithms and simulated
annealing, at a cost of some more external
memory.
The solution consists in ``virtualizing'' on the same synaptic array
the different members of the population. The weights of each member
shall be stored in a different area of the external memory
and from there moved in blocks into the synaptic array.
This solution is well suited to CPWM, thanks to its coherent nature.
Provided that capacitor refresh can be made sufficiently fast,
weight matrices can be changed at every CPWM clock cycle (or at every
n-th cycle), during the idle phase.
A prototype of an array of low power D/A converters has
been designed (size is 350x250 microns).
A conversion time of 100 ns with about 11 mW power
dissipation per converter are feasible.
For an array of 32 converters, these figures correspond to an update
rate of about 10e8 weights/s,
with a total power dissipation of about 350mW (at highest
refresh speed).
Virtual networks are also used in
CINTIA
to interface the NN to the FSA.
The latter selects what block of the external digital weight
memory shall be used to refresh the neural weight matrix,
therefore selecting the desired Neuro-Fuzzy characteristic.
For more information look at
the article
presented at IJNS - International Journal on Neural Systems,
in the Special Issue on Microneuro '93.
If you need a program able to handle GZIP files under Windows 95,
download
WINPACK32.
Marcello Chiaberge
<marcello@polimage.polito.it> |
Last Updated:
10/03/1997 |
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