Personal information of Leonardo M. Reyneri
Curriculum Vitae
- Born in Torino (Italy) on 22/2/1961.
- In June 1979 he graduated from high school.
- In July 1984 he graduated in Electronic Engineering at Politecnico
di Torino with a score of 110/110 cum laude.
- In September 1984 he spent one year at the Technical Directorate of
the European Space Agency (ESA), in Noordwijk (The Netherlands), for a
training period.
- In September 1984 he was employed again at the European Space Agency
(ESA), in Noordwijk, as a full Staff Member in the On-Board Data Handling
Division, where he remained until August 1987.
- In September 1987 he started to work at the Dept. of Electronics of
Politecnico di Torino (Italy), with a grant from SGS (now ST), until October
1988.
- From november 1988 he worked at the Dept. of Electronics of Politecnico
di Torino as a PhD student in Electronics Engineering.
- From November 15 to December 15, 1990 he spent one month at the University
of Edimburgh, Dept. of Electronics.
- In September 1990 he was enrolled at Politecnico di Torino, Dept. of
Electronics, as a staff engineer. The start of the work has been delayed
until October, 1991, in order to complete his PhD studies.
- In November 1991 he became Associate Professor in Electronic Engineering.
- In November 1992 he started to teach at the University of Pisa, Dept.
of Information Engineering, where he is still at present.
Scientific and teaching activity
Pre-graduation Activity
- From 1977 to 1978, during high school, he designed and manufactured
a machine to count objects immersed in moving fluids, patented in Italy
in 1978.
- During University he has developed under request several graphical
and CAE programs and some programs for manufacturing automation.
- He graduated with a thesis on the ``Design of a VLSI Device for handling
of a Multiple Access Serial Line'', from which the work number has been
extracted.
Post-graduation Activity
His research activity during first years immediately following graduation
has covered the following field (see further for more details):
- Fully digital demodulators for telecommunications.
- Performance analysis of semiconductors at low temperatures and in high
radiation environments.
- Massively parallel processors (hardware and software).
- Neural Networks: theory and silicon implementations.
- Image compression and High Definition Television.
- Intelligent controls: theory and silicon implementations.
Activity at the European Space Agency
- During the first year spent at ESA (1984-1985) he has first carried
on a feasibility study (and later fully developed) a fully digital PSK
demodulator, the design of which has been covered by copyright in Italy.
Later he converted the design into a set of three identical VLSI devices.
The design has later been sold both to Selenia (the device is currently
flying on Italsat) and to Alcatel-Thomson Espace, who were both interested
to manufacture the device.
- Later he has been involved in the design of analog and digital filters
for microwave remote sensing detectors.
- In the meantime he has carried on a study on the small-signal behaviour
of semiconductors at criogenic temperatures (4 to 77 K) and in ionizing
radiation fields. The results have lead to the design and manufacturing
of an analog multiplexer GaAs device with a very low power consumption,
suited to operate at the above mentioned temperatures. The design has been
patented in France and patent coverage later extended to the U.S.A. That
device has been manufactured from BORER. When the device became available,
he also tested and characterised the device.
- During the other two year spent at ESA, as a full staff memeber (1985-1987),
he has been involved in the supervision of the design of several integrated
circuits among which (apart from the PSK demodulator and the analog multiplexer
mentioned above) several interface controllers for serial and parallel
buses complying to ESA standards (with various problems of reliability,
fault tolerance, low power consumption, tolerance to radiations, etc.).
In particular he has developed a novel serial interface for the transmission
of data packets satisfying the newer requirements on reliability and speed
needed by the latest space missions. He has also designed a chip for its
handling. At the end he has also cooperated to the update of technical
specifications of on-board satellite interfaces.
Activity at Politecnico di Torino
- During the five years he spent at Politecnico di Torino (1987-1992)
he has analysed the problems arising during automatic
verification of VLSI and WSI integrated circuits. He has fully designed
a massively parallel processor (PAPRICA),
dedicated to the speed-up of bit-map-based CAD tools (e.g. DRC, circuit
extraction, routing). He has spent four months for the design of a full-custom
device containing a 4x4 matrix of such processors. The device has been
manufactured by ES2. Chip complexity is about 35.000 transistors. Later
he has also developed a software simulator of that processor and some software
and hardware supports for a more user-friendly operation (in particular:
control and interface devices, a programming environment, etc.).
The device has been tested only one year later, due to manufacturer's delays.
In the mean time, he has cooperated to develop a self-standing image processing
system based on an array of 16 such devices, a control unit and a host
workstation.
During the same period, he has also carried on other minor research studies,
namely: on oscillatory
metastability, with a theoretical analysis and the characterisation
of manufactured test devices, and on methodologies for distributed
testing of multi-stage packet interconnection networks.
- Starting from July 1988 he has also been involved in the silicon
implementations of Artificial Neural Networks. During this activity
he has faced several theoretical and practical problems, such as:theoretical
analysis of reciprocal influence of resolution, interconnection locality
and network accuracy; design of full-custom analog silicon cells with
very small footprint and self-learning capabilities; functional analysis
and design of analog cells with capacitive weight storage; alternative
technologies for analog storage; design
and manufacturing of mixed analog/digital pulse stream neural cells;
theoretical study on collective stochastic performance of neural aggregates
using pulse streams as computation paradigms. All these works have led
to the patenting of a mixed analog/digital
neural cell.
In the field of neural networks, he has designed several full-custom VLSI
devices, mostly using Pulse Stream computation techniques: a first fully
analog network (not manufactured); a second one using mixed
analog/digital technology with digital weight storage; a third one
with analog/digital technology and externally refreshed analog weight storage;
some glue devices to build complex hardware neural systems.
During the period he spent at the University of Edimburgh (end 1990) he
has analysed the feasibility of interconnection structures for complex
neural networks, with constraints on interconnection signals, exploiting
the multiplexing capabilities of pulse streams. He has also carried on
a theoretical analysis on pulse stream neural systems and compared their
performance.
- In the latest years he has also been involved in several research projects,
both in the field of massively parallel processing systems (e.g. Italian
project MADESS, Europeans project PROMETHEUS) and neural networks (e.g.
ESPRIT project NERVES and Italy-Spain cooperations).